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XCV1600E-7BG560I

FPGA - Field Programmable Gate Array

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XCV1600E-7BG560I General Description

Virtex®-E Field Programmable Gate Array (FPGA) IC 404 589824 34992 560-LBGA Exposed Pad, Metal

Specifications

Pbfree Code No Part Life Cycle Code Obsolete
Pin Count 560 Reach Compliance Code not_compliant
ECCN Code 3A991.D HTS Code 8542.39.00.01
Clock Frequency-Max 400 MHz Combinatorial Delay of a CLB-Max 0.42 ns
JESD-30 Code S-PBGA-B560 JESD-609 Code e0
Length 42.5 mm Moisture Sensitivity Level 3
Number of CLBs 7776 Number of Equivalent Gates 419904
Number of Inputs 404 Number of Logic Cells 34992
Number of Outputs 404 Number of Terminals 560
Organization 7776 CLBS, 419904 GATES Peak Reflow Temperature (Cel) 225
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 1.7 mm Supply Voltage-Max 1.89 V
Supply Voltage-Min 1.71 V Supply Voltage-Nom 1.8 V
Surface Mount YES Technology CMOS
Terminal Finish Tin/Lead (Sn63Pb37) Terminal Form BALL
Terminal Pitch 1.27 mm Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 Width 42.5 mm

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