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XC1765ESOG8C

FPGA Configuration PROMs

XC1765ESOG8C General Description

The XC1700 family of configuration PROMs provides aneasy-to-use, cost-effective method for storing large XilinxFPGA configuration bitstreams. When the FPGA is in Master Serial mode, it generates aconfiguration clock that drives the PROM. A short accesstime after the rising clock edge, data appears on the PROMDATA output pin that is connected to the FPGA DIN pin. TheFPGA generates the appropriate number of clock pulses tocomplete the configuration. After configured, it disables the PROM. When the FPGA is in Slave Serial mode, the PROMand the FPGA must both be clocked by an incoming signal.

Multiple devices can be concatenated by using the CEOoutput to drive the CE input of the following device. Theclock inputs and the DATA outputs of all PROMs in thischain are interconnected. All devices are compatible andcan be cascaded with other members of the family.

For device programming, either the Xilinx Alliance orFoundation software compiles the FPGA design file into astandard Hex format, which is then transferred to mostcommercial PROM programmers.

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Specifications

Category Integrated Circuits (ICs)MemoryConfiguration Proms for FPGAs Series -
Programmable Not Verified Programmable Type OTP
Memory Size 65kb Voltage - Supply 4.75V ~ 5.25V
Operating Temperature 0°C ~ 70°C Mounting Type Surface Mount
Base Product Number XC1765E

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