This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.

Images are for reference only,

See Technical Specifications

EP4CE40F29C8N

OTHER 2003 RoHS Compliant BALL FPGA 85C 141.8kB 200MHz 1.24V

Manufacturer:

Intel
Mfr.Part #:

EP4CE40F29C8N
Datasheet:

EP4CE40F29C8N Datasheet (PDF)
Programmabe:

Not Verified
Number of LABs/CLBs:

2475
Number of Logic Elements/Cells:

39600
Total RAM Bits:

1161216
EDA/CAD Models:

Request Free CAD Models for EP4CE40F29C8N

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

EP4CE40F29C8N General Description

FPGA, CYCLONE IV, 40K, 780FBGA; No. of Logic Blocks: 2475; No. of Macrocells: 39600; FPGA Family: Cyclone IV; Logic Case Style: FBGA; No. of Pins: 780Pins; No. of Speed Grades: 8; Total RAM Bits: 1134Kbit; No. of I/O's: 532I/O's; Clock Management: PLL; Core Supply Voltage Min: 1.15V; Core Supply Voltage Max: 1.25V; I/O Supply Voltage: 3.3V; Operating Frequency Max: 472.5MHz; Product Range: -; MSL: MSL 3 - 168 hours; SVHC: No SVHC (17-Dec-2015); Core Supply Voltage Range: 1.15V to 1.25V; Logic Function Number: FPGA; Operating Temperature Max: 85°C; Operating Temperature Min: 0°C; Operating Temperature Range: 0°C to +85°C

Key Features

Low-cost, low-power FPGA fabric: 6K to 150K logic elements Up to 6.3 Mb of embedded memory Up to 360 18 × 18 multipliers for DSP processing intensive applications Protocol bridging applications for under 1.5 W total power Cyclone IV GX devices offer up to eight high-speed transceivers that provide: Data rates up to 3.125 Gbps 8B/10B encoder/decoder 8-bit or 10-bit physical media attachment (PMA) to physical coding sublayer (PCS) interface Byte serializer/deserializer (SERDES) Word aligner Rate matching FIFO TX bit slipper for Common Public Radio Interface (CPRI) Electrical idle Dynamic channel reconfiguration allowing you to change data rates andprotocols on-the-fly Static equalization and pre-emphasis for superior signal integrity 150 mW per channel power consumption Flexible clocking structure to support multiple protocols in a single transceiver block Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe) Gen 1: ×1, ×2, and ×4 lane configurations End-point and root-port configurations Up to 256-byte payload One virtual channel 2 KB retry buffer 4 KB receiver (Rx) buffer Cyclone IV GX devices offer a wide range of protocol support: PCIe (PIPE) Gen 1 ×1, ×2, and ×4 (2.5 Gbps) Gigabit Ethernet (1.25 Gbps) CPRI (up to 3.072 Gbps) XAUI (3.125 Gbps) Triple rate serial digital interface (SDI) (up to 2.97 Gbps) Serial RapidIO (3.125 Gbps) Basic mode (up to 3.125 Gbps) V-by-One (up to 3.0 Gbps) DisplayPort (2.7 Gbps) Serial Advanced Technology Attachment (SATA) (up to 3.0 Gbps) OBSAI (up to 3.072 Gbps) Up to 532 user I/Os LVDS interfaces up to 840 Mbps transmitter (Tx), 875 Mbps Rx Support for DDR2 SDRAM interfaces up to 200 MHz Support for QDRII SRAM and DDR SDRAM up to 167 MHz Up to eight phase-locked loops (PLLs) per device Offered in commercial and industrial temperature grades

Specifications

Programmabe	Not Verified	Number of LABs/CLBs	2475
Number of Logic Elements/Cells	39600	Total RAM Bits	1161216
Number of I/O	532	Number of Gates	-
Voltage - Supply	1.15V ~ 1.25V	Mounting Type	Surface Mount
Operating Temperature	0°C ~ 85°C (TJ)