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TSB43AB23IPDTEP
1394 Interface IC Mil Enh OHCI PHY/ Link Layer Cntrlr
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Manufacturer:
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Mfr.Part #:
TSB43AB23IPDTEP
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Datasheet:
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Programmable:
Not Verified
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Protocol:
IEEE 1394
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Function:
Physical Layer Controller
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Interface:
PCI
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EDA/CAD Models:
Availability: 3122 PCS
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TSB43AB23IPDTEP General Description
IEEE 1394 Physical Layer Controller IEEE 1394-1995, 1394a-2000, OHCI, Firewire™, i.Link™ PCI Interface 128-TQFP (14x14)
Key Features
- Fully compliant with 1394 Open Host Controller Interface Specification (Release 1.1)
- Fully compliant with provisions of IEEE Std 1394-1995 for a high-performance serial busand IEEE Std 1394a-2000
- Fully interoperable with FireWire and i.LINK implementations of IEEE Std 1394
- Compliant with Intel Mobile Power Guideline 2000
- Full IEEE Std 1394a-2000 support includes: connection debounce, arbitrated short reset, multispeed concatenation, arbitration acceleration, fly-by concatenation, and port disable/suspend/resume
- Power-down features to conserve energy in battery-powered applications include: automatic device power down during suspend, PCI power management for link-layer, and inactive ports powered down
- Ultralow-power sleep mode
- Three IEEE Std 1394a-2000 fully compliant cable ports at 100M bits/s, 200M bits/s, and 400M bits/s
- Cable ports monitor line conditions for active connection to remote node
- Cable power presence monitoring
- Separate cable bias (TPBIAS) for each port
- 1.8-V core logic with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments
- Physical write posting of up to three outstanding transactions
- PCI burst transfers and deep FIFOs to tolerate large host latency
- PCI_CLKRUN\ protocol
- External cycle timer control for customized synchronization
- Extended resume signaling for compatibility with legacy DV components
- PHY-link logic performs system initialization and arbitration functions
- PHY-link encode and decode functions included for data-strobe bit level encoding
- PHY-link incoming data resynchronized to local clock
- Low-cost 24.576-MHz crystal provides transmit and receive data at 100M bits/s, 200M bits/s, and 400M bits/s
- Node power class information signaling for system power management
- Serial ROM interface supports 2-wire serial EEPROM devices
- Two general-purpose I/Os
- Register bits give software control of contender bit, power class bits, link active control bit, and IEEE Std 1394a-2000 features
- Fabricated in advanced low-power CMOS process
- Isochronous receive dual-buffer mode
- Out-of-order pipelining for asynchronous transmit requests
- Register access fail interrupt when the PHY SCLK is not active
- PCI power-management D0, D1, D2, and D3 power states
- Initial bandwidth available and initial channels available registers
- PME\ support per 1394 Open Host Controller Interface Specification
Specifications
Category | Integrated Circuits (ICs)InterfaceControllers | Series | - |
Programmable | Not Verified | Protocol | IEEE 1394 |
Function | Physical Layer Controller | Interface | PCI |
Standards | IEEE 1394-1995, 1394a-2000, OHCI, Firewire™, i.Link™ | Voltage - Supply | 3V ~ 3.6V |
Current - Supply | - | Operating Temperature | -40°C ~ 85°C |
Base Product Number | TSB43AB23 |
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Availability: 3122 PCS
+BOMQty. | Unit Price | Ext. Price |
---|---|---|
1+ | $81.738 | $81.74 |
200+ | $31.631 | $6,326.20 |
500+ | $30.520 | $15,260.00 |
1000+ | $29.972 | $29,972.00 |
The prices below are for reference only.
All bill of materials (BOM) can be sent via email to [email protected], or fill below form to Quote for TSB43AB23IPDTEP, guaranteed quotes back within 12hr.
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