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See Technical Specifications

SN65LVDS17DRFT

2.5-V/3.3-V oscillator gain stage/buffer with enable

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

SN65LVDS17DRFT
Datasheet:

SN65LVDS17DRFT Datasheet (PDF)
Type:

Buffer, ReDriver
Input:

PECL
Output:

LVDS
Data Rate (Max):

4Gbps
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SN65LVDS17DRFT General Description

These four devices are high-frequency oscillator gain stages supporting both LVPECL or LVDS on the high gain outputs in 3.3-V or 2.5-V systems. Additionally, provides the option of both single-ended input (PECL levels on the SN65LVx16) and fully differential inputs on the SN65LVx17.

The SN65LVx16 provides the user a Gain Control (GC) for controlling the Q output from 300 mV to 860 mV either by leaving it open (NC), grounded, or tied to V_CC. (When left open, the Q output defaults to 575 mV.) The Q on the SN65LVx17 defaults to 575 mV as well.

Both devices provide a voltage reference (V_BB) of typically 1.35 V below V_CC for use in receiving single-ended PECL input signals. When not used, V_BB should be unconnected or open.

All devices are characterized for operation from -40°C to 85°C.

Key Features

Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
Clock Rates to 2 GHz
- 140-ps Output Transition Times
- 0.11 ps Typical Intrinsic Phase Jitter
- Less than 630 ps Propagation Delay Times
2.5-V or 3.3-V Supply Operation
2-mm × 2-mm Small-Outline No-Lead Package
APPLICATIONS
- PECL-to-LVDS Translation
- Clock Signal Amplification

Specifications

Category	Integrated Circuits (ICs)InterfaceSignal Buffers, Repeaters, Splitters	Series	-
Type	Buffer, ReDriver	Applications	-
Input	PECL	Output	LVDS
Data Rate (Max)	4Gbps	Number of Channels	1
Delay Time	460ps	Signal Conditioning	-
Voltage - Supply	2.375V ~ 3.6V	Current - Supply	40mA
Operating Temperature	-40°C ~ 85°C	Mounting Type	Surface Mount
Base Product Number	65LVDS17