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SCAN90CP02SP/NOPB +BOM

1.5-Gbps 2x2 LVDS crosspoint switch with pre-emphasis and IEEE 1149.6

SCAN90CP02SP/NOPB General Description

The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100% pre-emphasis overcomes external ISI jitter effects of lossy backplanes and cables. The differential inputs interface to LVDS and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The SCAN90CP02 can also be used with ASICs and FPGAs. The non-blocking crosspoint architecture is pin-configurable as a 1:2 clock or data splitter, 2:1 redundancy mux, crossover function, or dual buffer for signal booster and stub hider applications.

Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and differential LVDS PCB interconnect. The 3.3V supply, CMOS process, and LVDS I/O ensure high performance at low power over the entire industrial -40 to +85°C temperature range.

Texas Instruments, Inc Inventory

Key Features

  • 1.5 Gbps per Channel
  • Low Power: 70 mA in Dual Repeater Mode @1.5 Gbps
  • Low Output Jitter
  • Configurable 0/25/50/100% Pre-Emphasis Drives Lossy Backplanes and Cables
  • Non-Blocking Architecture Allows 1:2 Splitter, 2:1 Mux, Crossover, and Dual Buffer Configurations
  • Flow-Through Pinout
  • LVDS/BLVDS/CML/LVPECL Inputs, LVDS Outputs
  • IEEE 1149.1 and 1149.6 Compliant
  • Single 3.3V Supply
  • Separate Control of Inputs and Outputs Allows for Power Savings
  • Industrial -40 to +85°C Temperature Range
  • 28-Lead UQFN Package, or 32-Lead LQFP Package

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Texas Instruments, Inc Original Stock
Texas Instruments, Inc Inventory

Specifications

Function Crosspoint Protocols BLVDS, CML, LVDS, LVPECL
Number of transmitters 2 Number of receivers 2
Supply voltage (V) 3.3 Signaling rate (MBits) 1500
Input signal CML, LVDS, LVPECL Output signal LVDS
Rating Catalog Operating temperature range (°C) -40 to 85
feature-type feature-logic-function
feature-logic-family feature-array-configuration 2x2
feature-number-of-arrays 1 feature-maximum-data-rate-mbps 1.5
feature-number-of-elements-per-chip feature-configuration
feature-number-of-outputs-per-chip feature-number-of-inputs-per-chip
feature-polarity feature-packaging Tape and Reel
feature-rad-hard feature-pin-count 28
feature-cecc-qualified No feature-esd-protection Yes
feature-escc-qualified feature-military No
feature-aec-qualified No feature-aec-qualified-number
feature-eccn-code 5A991B1 feature-svhc Yes
feature-svhc-exceeds-threshold No

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