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See Technical Specifications

OX16PCI952-TQAG

UART 2-CH 128byte FIFO 5V 128-Pin TQFP

Manufacturer:

Broadcom Corporation
Mfr.Part #:

OX16PCI952-TQAG
Datasheet:

OX16PCI952-TQAG Datasheet (PDF)
launch_date:

Aug 2, 2005
last_inspection_date:

19 APR 2023
supplier_cage_code:

50434
htsusa:

8542390001
EDA/CAD Models:

Request Free CAD Models for OX16PCI952-TQAG

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

• Two 16C950 High performance UART channels
• IEEE1284 Compliant SPP/EPP/ECP parallel port
• Multi-function target PCI controller. Fully compliant to PCI bus specification 2.2 and PCI Power Management 1.0.
• Function access to pre-configure each UART and the parallel port, prior to handover to generic device drivers.
• UARTs fully software compatible with 16C550-type devices.
• Baud rates up to 15Mbps in asynchronous mode and 60Mbps in external 1x clock mode
• 128-byte deep FIFO per transmitter and receiver
• Flexible clock prescaler from 1 to 31.875
• Automated in-band flow control using programmable Xon/Xoff in both directions
• Automated out-of-band flow control using CTS#/RTS# and/or DSR#/DTR#
• Arbitrary trigger levels for receiver and transmitter FIFO interrupts and automatic in-band and out-ofband flow control
• Infra-red (IrDA) receiver and transmitter operation
• 5, 6, 7, 8 and 9-bits data framing
• Global Interrupt Status and readable FIFO levels to facilitate implementation of efficient device drivers
• Detection of bad data in the receiver FIFO
• 2 multi-purpose IO pins which can be configured as interrupt inputs or ‘wake-up’ pins (via local registers).
• Auto-detection of a range of optional MicrowireTM compatible EEPROMs, to reconfigure device.
• Operation via IO or memory mapping.
• 5.0V operation
• 128 pin TQFP package

Specifications

place		launch_date	Aug 2, 2005
last_inspection_date	19 APR 2023	supplier_cage_code	50434
htsusa	8542390001	schedule_b	8542390000
ppap		aec