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See Technical Specifications

M4A5-64/32-10JNC +BOM

EE PLD, 10ns, 64-Cell, CMOS, PQCC44, LEAD FREE, PLASTIC, LCC-44

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

M4A5-64/32-10JNC
Datasheet:

M4A5-64/32-10JNC Datasheet (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Obsolete
Pin Count:

44
Reach Compliance Code:

compliant
EDA/CAD Models:

Request Free CAD Models for M4A5-64/32-10JNC

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M4A5-64/32-10JNC General Description

GENERAL DESCRIPTIONThe ispMACH™ 4A family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention. The ispMACH 4A families offer 5-V (M4A5- xxx) and 3.3-V (M4A3-xxx) operation.

Key Features

The features of the M4A5-64/32-10JNC include a 44-pin PLCC package with 32 I/Os and 2 dedicated inputs

Application

The M4A5-64/32-10JNC device is part of the ispMACH 4A Family
which offers advanced features and macrocell densities
This device is suitable for applications requiring programmable logic with 64 macrocells and 32 I/Os
operating at a junction temperature of up to +130°C
It is available in a variety of package options
including BGA and TQFP
The device also features Bus-Friendly inputs
individual output slew rate control
and mixed-voltage design capabilities

Specifications

Pbfree Code	Yes	Part Life Cycle Code	Obsolete
Pin Count	44	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.39.00.01
Additional Feature	YES	Clock Frequency-Max	62.5 MHz
In-System Programmable	YES	JESD-30 Code	S-PQCC-J44
JESD-609 Code	e3	JTAG BST	YES
Length	16.5862 mm	Moisture Sensitivity Level	3
Number of Dedicated Inputs		Number of I/O Lines	32
Number of Macro Cells	64	Number of Terminals	44
Operating Temperature-Max	70 °C	Operating Temperature-Min
Organization	0 DEDICATED INPUTS, 32 I/O	Output Function	MACROCELL
Peak Reflow Temperature (Cel)	245	Programmable Logic Type	EE PLD
Propagation Delay	10 ns	Qualification Status	Not Qualified
Seated Height-Max	4.572 mm	Supply Voltage-Max	5.25 V
Supply Voltage-Min	4.75 V	Supply Voltage-Nom	5 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	COMMERCIAL	Terminal Finish	MATTE TIN
Terminal Form	J BEND	Terminal Pitch	1.27 mm
Terminal Position	QUAD	Time@Peak Reflow Temperature-Max (s)	40
Width	16.5862 mm