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See Technical Specifications

LP38502ASD-ADJ/NOPB

1.5-A, adjustable ultra-low-dropout voltage regulator with enable

Manufacturer:

TI
Mfr.Part #:

LP38502ASD-ADJ/NOPB
Datasheet:

LP38502ASD-ADJ/NOPB Datasheet (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Active
Pin Count:

8
Reach Compliance Code:

compliant
EDA/CAD Models:

Request Free CAD Models for LP38502ASD-ADJ/NOPB

Email: [email protected]

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LP38502ASD-ADJ/NOPB General Description

TIs FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

GND Pin Current: Typically 2 mA at 1.5-A load current.
Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
Precision Output: grade versions available with 1.5% V_ADJ tolerance (25°C) and 3% over line, load, and temperature.

Key Features

Input Voltage: 2.7 V to 5.5 V
Adjustable Output Voltage: 0.6 V to 5 V
FlexCap: Stable with Ceramic, Tantalum, or
Aluminum Capacitors
Stable with 10-µF Input and Output Capacitors
Low Ground-Pin Current
25-nA Quiescent Current in Shutdown Mode
Ensured Output Current of 1.5 A
Ensured V_ADJ Accuracy of ±1.5% at 25°C (A
Grade)
Ensured Accuracy of ±3.5% at 25°C (STD)
Overtemperature and Overcurrent Protection
ENABLE Pin (LP38502)

Specifications

Source Content uid	LP38502ASD-ADJ/NOPB	Pbfree Code	Yes
Part Life Cycle Code	Active	Pin Count	8
Reach Compliance Code	compliant	ECCN Code	EAR99
HTS Code	8542.39.00.01	Adjustability	ADJUSTABLE
Dropout Voltage1-Max	0.375 V	Dropout Voltage1-Nom	0.22 V
Input Voltage-Max	5.5 V	Input Voltage-Min	2.7 V
JESD-30 Code	R-PDSO-N8	JESD-609 Code	e3
Length	3 mm	Moisture Sensitivity Level	1
Number of Functions	1	Number of Outputs	1
Number of Terminals	8	Operating Temperature TJ-Max	125 °C
Operating Temperature TJ-Min	-40 °C	Operating Temperature-Max	125 °C
Operating Temperature-Min	-40 °C	Output Current1-Max	1.5 A
Output Voltage1-Max	5 V	Output Voltage1-Min	0.6 V
Packing Method	TR	Peak Reflow Temperature (Cel)	260
Qualification Status	Not Qualified	Regulator Type	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
Seated Height-Max	0.8 mm	Surface Mount	YES
Technology	CMOS	Terminal Finish	Matte Tin (Sn)
Terminal Form	NO LEAD	Terminal Pitch	0.5 mm
Terminal Position	DUAL	Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Voltage Tolerance-Max	2%	Width	2.5 mm