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LFXP2-8E-5FTN256I

XP2 Field Programmable Gate Array (FPGA) IC 201 226304 8000 256-LBGA

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XP2 Field Programmable Gate Array (FPGA) IC 201 226304 8000 256-LBGA

Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.
Supports up to eight PowerPC bus masters with unlimited slave device support.
Supports two outstanding bus accesses.
Supports address only transfer and address bus retry.
Independent address bus and data bus tenure with separate bus grant and data bus grant.
Option for fixed priority assignment or rotating priority scheme.
Designed for ASIC or programmable logic device implementations in various system environments.
Fully static design with edge triggered flip-flops.
Optimized for ispXPGA product family.

Pbfree Code	Yes	Part Life Cycle Code	Active
Pin Count	256	Reach Compliance Code	compliant
ECCN Code	3A991.D	HTS Code	8542.39.00.01
Clock Frequency-Max	435 MHz	Combinatorial Delay of a CLB-Max	0.494 ns
JESD-30 Code	S-PBGA-B256	JESD-609 Code	e1
Length	17 mm	Moisture Sensitivity Level	3
Number of CLBs	1000	Number of Inputs	201
Number of Logic Cells	8000	Number of Outputs	201
Number of Terminals	256	Operating Temperature-Max	100 °C
Operating Temperature-Min	-40 °C	Peak Reflow Temperature (Cel)	260
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	2.1 mm	Supply Voltage-Max	1.26 V
Supply Voltage-Min	1.14 V	Supply Voltage-Nom	1.2 V
Surface Mount	YES	Technology	CMOS
Terminal Finish	TIN SILVER COPPER	Terminal Form	BALL
Terminal Pitch	1 mm	Terminal Position	BOTTOM
Width	17 mm