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LFXP2-5E-5MN132I

XP2 Field Programmable Gate Array (FPGA) IC 86 169984 5000 132-LFBGA, CSPBGA

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XP2 Field Programmable Gate Array (FPGA) IC 86 169984 5000 132-LFBGA, CSPBGA

Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.
Supports up to eight PowerPC bus masters with unlimited slave device support.
Supports two outstanding bus accesses.
Supports address only transfer and address bus retry.
Independent address bus and data bus tenure with separate bus grant and data bus grant.
Option for fixed priority assignment or rotating priority scheme.
Designed for ASIC or programmable logic device implementations in various system environments.
Fully static design with edge triggered flip-flops.
Optimized for ispXPGA product family.

Pbfree Code	Yes	Part Life Cycle Code	Active
Pin Count	132	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.39.00.01
Clock Frequency-Max	435 MHz	Combinatorial Delay of a CLB-Max	0.494 ns
JESD-30 Code	S-PBGA-B132	JESD-609 Code	e1
Length	8 mm	Moisture Sensitivity Level	3
Number of CLBs	625	Number of Inputs	86
Number of Logic Cells	5000	Number of Outputs	86
Number of Terminals	132	Operating Temperature-Max	100 °C
Operating Temperature-Min	-40 °C	Peak Reflow Temperature (Cel)	260
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	1.35 mm	Supply Voltage-Max	1.26 V
Supply Voltage-Min	1.14 V	Supply Voltage-Nom	1.2 V
Surface Mount	YES	Technology	CMOS
Terminal Finish	TIN SILVER COPPER	Terminal Form	BALL
Terminal Pitch	0.5 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	40	Width	8 mm