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LFE3-35EA-8FN484C

ECP3 Field Programmable Gate Array (FPGA) IC 295 1358848 33000 484-BBGA

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

LFE3-35EA-8FN484C
Datasheet:

LFE3-35EA-8FN484C Datasheet (PDF)
Series:

ECP3
Programmabe:

Not Verified
Number of LABs/CLBs:

4125
Number of Logic Elements/Cells:

33000
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LFE3-35EA-8FN484C General Description

ECP3 Field Programmable Gate Array (FPGA) IC 295 1358848 33000 484-BBGA

Key Features

Higher Logic Density for Increased System Integration
17K to 149K LUTs
116 to 586 I/Os
Embedded SERDES
150 Mbps to 3.2 Gbps for Generic 8b10b, 10-bit SERDES, and 8-bit SERDES modes
Data Rates 230 Mbps to 3.2 Gbps per channel for all other protocols
Up to 16 channels per device: PCI Express, SONET/SDH, Ethernet (1GbE, SGMII, XAUI), CPRI, SMPTE 3G and Serial RapidIO
sysDSP™
Fully cascadable slice architecture
12 to 160 slices for high performance multiply and accumulate
Powerful 54-bit ALU operations
Time Division Multiplexing MAC Sharing
Rounding and truncation
Each slice supports
— Half 36x36, two 18x18 or four 9x9 multipliers
— Advanced 18x36 MAC and 18x18 Multiply-Multiply-Accumulate (MMAC) operations
Flexible Memory Resources
Up to 6.85Mbits sysMEM™ Embedded Block RAM (EBR)
36K to 303K bits distributed RAM
sysCLOCK Analog PLLs and DLLs
Two DLLs and up to ten PLLs per device
Pre-Engineered Source Synchronous I/O
DDR registers in I/O cells
Dedicated read/write levelling functionality
Dedicated gearing logic
Source synchronous standards support
— ADC/DAC, 7:1 LVDS, XGMII
— High Speed ADC/DAC devices
Dedicated DDR/DDR2/DDR3 memory with DQS support
Optional Inter-Symbol Interference (ISI)  correction on outputs
Programmable sysI/O™ Buffer Supports Wide Range of Interfaces
On-chip termination
Optional equalization filter on inputs
LVTTL and LVCMOS 33/25/18/15/12
SSTL 33/25/18/15 I, II
HSTL15 I and HSTL18 I, II
PCI and Differential HSTL, SSTL
LVDS, Bus-LVDS, LVPECL, RSDS, MLVDS
Flexible Device Configuration
Dedicated bank for configuration I/Os
SPI boot flash interface
Dual-boot images supported
Slave SPI
TransFR™ I/O for simple field updates
Soft Error Detect embedded macro
System Level Support
IEEE 1149.1 and IEEE 1532 compliant
Reveal Logic Analyzer
ORCAstra FPGA configuration utility
On-chip oscillator for initialization & general use
1.2 V core power supply

Specifications

Series	ECP3	Programmabe	Not Verified
Number of LABs/CLBs	4125	Number of Logic Elements/Cells	33000
Total RAM Bits	1358848	Number of I/O	295
Voltage - Supply	1.14V ~ 1.26V	Mounting Type	Surface Mount
Operating Temperature	0°C ~ 85°C (TJ)	Base Product Number	LFE3-35