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See Technical Specifications

LC72366

Microcontroller, MROM, 5MHz, CMOS, PQFP80, QFP-80

Manufacturer:

SANYO ELECTRIC CO LTD
Mfr.Part #:

LC72366
Datasheet:

LC72366 Datasheet (PDF)
Part Life Cycle Code:

Transferred
Pin Count:

80
HTS Code:

8542.31.00.01
Has ADC:

YES
EDA/CAD Models:

Request Free CAD Models for LC72366

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

ROM
— LC72358N: 8K steps (8191 × 16 bits)
— LC72362N: 12K steps (12287 × 16 bits)
— LC72366: 16K steps (16383 × 16 bits)
The subroutine area in both products is 4K steps
(4095 × 16 bits).
RAM
— LC72358N, 72362N: 512 × 4 bits (banks 0 to 7)
— LC72366: 1K × 4 bits (banks 0 to F)
Stack: Eight levels
Serial I/O:
Three channels (8-bit 3-wire format)
There are three internal serial clocks: 12.5 kHz,
37.5 kHz and 187.5 kHz.
External interrupts:
Two channels (the INT0 and INT1 pins)
Switching between rising and falling edge detection is
supported.
Internal interrupts:
Three channels
— Two internal timer interrupt channels
The timers provide eight interrupt periods: 100 µs,
1 ms, 2 ms, 5 ms, 10 ms, 50 ms, 125 ms and 250 ms.
— One serial I/O interrupt channel
Multiple interrupt levels:
Four levels
Hardware priority order
INT0 pin> INT1 pin> SI/O pin> internal timer 0>
internal timer 1
A/D converter: Six channels (6-bit successive approximation type)
General-purpose ports
— Input ports: 10
— Output ports: 28
— I/O ports: 25 (These pins can be switched between input and output in bit units.)
PLL block
— Built-in sub-charge pump for high-speed locking
— Support for dead zone control
— Built-in unlock detection circuit
— Twelve reference frequencies: 1, 3, 3.125, 5, 6.25, 9, 10, 12.5, 25, 30, 50 and 100 kHz
Universal counter: 20 bits
Supports frequency and period measurement with counting periods of 1, 4, 8 and 32 ms.
Timers: Timer interrupt periods
100 µs, 1 ms, 2 ms, 5 ms, 10 ms, 50 ms, 125 ms and 250 ms
Beep: Six frequencies: 2.08 kHz, 2.25 kHz, 2.5 kHz, 3.0 kHz, 3.75 kHz, 4.17 kHz.
Reset: Built-in voltage detection type reset circuit
Cycle time: 1.33 µs (all instructions execute in one cycle)
Halt mode: The microcontroller operating clock is stopped in halt mode.
There are four types of event that clear halt mode: interrupt requests, timer FF overflows, key inputs, and hold pin inputs.
Operating supply voltage: 4.5 to 5.5 V (3.5 to 5.5 V when only the controller block operates)
Package: QFP80E (QIP80E)
OTP version: LC72P366
Development tools:
Emulator .RE32N
Evaluation chip.LC72EV350
Evaluation chip board EB-72EV350

Specifications

Part Life Cycle Code	Transferred	Pin Count	80
Reach Compliance Code		HTS Code	8542.31.00.01
Has ADC	YES	Address Bus Width
Clock Frequency-Max	5 MHz	DAC Channels	NO
DMA Channels	NO	External Data Bus Width
JESD-30 Code	R-PQFP-G80	Length	20 mm
Number of I/O Lines	66	Number of Terminals	80
Operating Temperature-Max	85 °C	Operating Temperature-Min	-40 °C
PWM Channels	NO	Qualification Status	Not Qualified
ROM Programmability	MROM	Seated Height-Max	3 mm
Speed	5 MHz	Supply Voltage-Max	5.5 V
Supply Voltage-Min	3.5 V	Supply Voltage-Nom	5 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	INDUSTRIAL	Terminal Form	GULL WING
Terminal Pitch	0.8 mm	Terminal Position	QUAD
Width	14 mm	uPs/uCs/Peripheral ICs Type	MICROCONTROLLER