This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.

Images are for reference only,

See Technical Specifications

K4B2G0846D-HCH9 +BOM

DRAM Chip DDR3 SDRAM 2Gbit 256Mx8 1.5V 78-Pin FBGA

Manufacturer:

SAMSUNG SEMICONDUCTOR INC
Mfr.Part #:

K4B2G0846D-HCH9
Datasheet:

K4B2G0846D-HCH9 Datasheet (PDF)
Part Life Cycle Code:

Obsolete
Reach Compliance Code:

compliant
ECCN Code:

EAR99
HTS Code:

8542.32.00.36
EDA/CAD Models:

Request Free CAD Models for K4B2G0846D-HCH9

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

The 2Gb DDR3 SDRAM D-die is organized as a 64Mbit x 4 I/Os x 8banks, 32Mbit x 8 I/Os x 8banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1600Mb/sec/pin (DDR3-1600) for general applications. The chip is designed to comply with the following key DDR3 SDRAM features such as posted CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset .

Specifications

Part Life Cycle Code	Obsolete	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.32.00.36
Access Time-Max	0.255 ns	Clock Frequency-Max (fCLK)	667 MHz
I/O Type	COMMON	Interleaved Burst Length	8
JESD-30 Code	R-PBGA-B78	Memory Density	2147483648 bit
Memory IC Type	DDR3 DRAM	Memory Width	8
Number of Terminals	78	Number of Words	268435456 words
Number of Words Code	256000000	Operating Temperature-Max	85 °C
Operating Temperature-Min		Organization	256MX8
Output Characteristics	3-STATE	Power Supplies	1.5 V
Qualification Status	Not Qualified	Refresh Cycles	8192
Sequential Burst Length	8	Standby Current-Max	0.012 A
Supply Current-Max	0.135 mA	Supply Voltage-Nom (Vsup)	1.5 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	OTHER	Terminal Form	BALL
Terminal Pitch	0.8 mm	Terminal Position	BOTTOM