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See Technical Specifications

DS90UH928QSQE/NOPB

5MHz - 85MHz 24-bit Color FPD-Link III to FPD-Link Deserializer with HDCP

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

DS90UH928QSQE/NOPB
Datasheet:

DS90UH928QSQE/NOPB Datasheet (PDF)
Function:

Deserializer
Color depth (bps):

24
Input compatibility:

FPD-Link III LVDS
Pixel clock frequency (max) (MHz):

85
EDA/CAD Models:

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DS90UH928QSQE/NOPB General Description

The DS90UH928Q-Q1 deserializer, in conjunction with a DS90UH925Q-Q1 or DS90UH927Q-Q1 serializer, provides a solution for secure distribution of content-protected digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The digital video and audio data is protected using the industry standard HDCP copy protection scheme.The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.

The HDCP cipher engine is implemented in both the serializer and deserializer. HDCP keys are stored in on-chip memory.

Key Features

Qualified for Automotive Applications AEC-Q100
- Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range
- Device HBM ESD Classification Level ±8 kV
- Device CDM ESD Classification Level C6
Integrated HDCP Cipher Engine with On-Chip Key Storage
Supports HDCP Repeater Application
Bidirectional Control Channel Interface with I²C Compatible Serial Control Bus
Low EMI FPD-Link Video Output
Supports High Definition (720p) Digital Video
RGB888 + VS, HS, DE and I2S Audio Supported
5 MHz to 85 MHz Pixel Clock Support
Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
4 Bidirectional GPIO Channels with 2 Dedicated Pins
Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
AC-Coupled STP Interconnect Up to 10 Meters
DC-Balanced and Scrambled Data with Embedded Clock
Adaptive Cable Equalization
Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
Backward Compatible Modes

Specifications

Function	Deserializer	Color depth (bps)	24
Input compatibility	FPD-Link III LVDS	Pixel clock frequency (max) (MHz)	85
Output compatibility	FPD-Link	Features	HDCP
Signal conditioning	Adaptive Equalizer	EMI reduction	LVDS
Diagnostics	BIST	Rating	Automotive
Operating temperature range (°C)	-40 to 105	feature-function	Deserializer
feature-number-of-drivers	4	feature-number-of-receivers	1
feature-number-of-elements-per-chip	1	feature-transmission-data-rate-mbps	2975
feature-maximum-propagation-delay-time-ns		feature-input-signal-type	FPD-Link III LVDS
feature-differential-input-low-threshold-voltage-v	-0.05	feature-differential-input-high-threshold-voltage-v	0.05
feature-maximum-differential-output-voltage-v	0.6	feature-maximum-input-current-ua	10
feature-supplier-temperature-grade		feature-packaging	Tape and Reel
feature-rad-hard		feature-pin-count	48
feature-cecc-qualified	No	feature-esd-protection
feature-escc-qualified		feature-military	No
feature-aec-qualified	Yes	feature-aec-qualified-number	AEC-Q100
feature-auto-motive	Yes	feature-p-pap	Yes
feature-eccn-code	EAR99	feature-svhc	Yes
feature-svhc-exceeds-threshold	No