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DAC5682ZIRGCT
Dual-Channel, 16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)
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Manufacturer:
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Mfr.Part #:
DAC5682ZIRGCT
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Datasheet:
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Programmable:
Not Verified
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Number of Bits:
16
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Number of D/A Converters:
2
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Settling Time:
10.4ns (Typ)
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EDA/CAD Models:
Availability: 5421 PCS
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DAC5682ZIRGCT General Description
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering.
The DAC5682Z is characterized for operation over the industrial temperature range of 40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681.
Key Features
- 16-Bit Digital-to-Analog Converter (DAC)
- 1.0 GSPS Update Rate
- 16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
- Interleaved I/Q Data for Dual-DAC Mode
- High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
- 2x-32x Clock Multiplying PLL/VCO
- 2x or 4x Interpolation Filters
- Stopband Transition 0.4 to 0.6 Fdata
- Filters Configurable in Either Low-Pass or High-Pass
Mode Allows Selection of Higher Order Image
- Fs/4 Coarse Mixer
- On-Chip 1.2-V Reference
- Differential Scalable Output: 2 to 20 mA
- Package: 64-Pin 9-mm × 9-mm QFN
- APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
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Specifications
Category | Integrated Circuits (ICs)Data AcquisitionDigital to Analog Converters (DAC) | Series | - |
Programmable | Not Verified | Number of Bits | 16 |
Number of D/A Converters | 2 | Settling Time | 10.4ns (Typ) |
Output Type | Current - Unbuffered | Differential Output | Yes |
Data Interface | LVDS - Parallel | Reference Type | External, Internal |
Voltage - Supply, Analog | 3V ~ 3.6V | Voltage - Supply, Digital | 1.7V ~ 1.9V |
INL/DNL (LSB) | ±4, ±2 | Architecture | Current Sink |
Operating Temperature | -40°C ~ 85°C | Mounting Type | Surface Mount |
Base Product Number | DAC5682 |
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Availability: 5421 PCS
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45 days delivery. Not test yet. I hope all be fine. Thanks.