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CDCP1803RGET +BOM
1:3 LVPECL clock buffer with programable divider
VQFN-24-
Manufacturer:
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Mfr.Part #:
CDCP1803RGET
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Datasheet:
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Type:
Fanout Buffer (Distribution), Divider, Multiplexer
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Number Of Circuits:
1
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Ratio - InputOutput:
1:3
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Differential - InputOutput:
Yes/Yes
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EDA/CAD Models:
Availability: 7344 PCS
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CDCP1803RGET General Description
The CDCP1803RGET is a high-performance LVPECL clock buffer that offers exceptional precision in clock distribution. With its programmable divider feature, it can efficiently distribute one pair of differential clock inputs to three pairs of LVPECL differential clock outputs with minimal skew. This ensures that your clock signals are synchronized accurately across multiple devices, allowing for seamless operation in complex systems. Operating within a wide temperature range of -40°C to 85°C, the CDCP1803RGET is well-suited for various industrial applications where temperature fluctuations are common
Key Features
- Distributes One Differential Clock Input to Three LVPECL Differential Clock Outputs
- Programmable Output Divider for Two LVPECL Outputs
- Low-Output Skew 15 ps (Typical)
- VCC Range 3 V–3.6 V
- Signaling Rate Up to 800-MHz LVPECL
- Differential Input Stage for Wide Common-Mode Range
- Provides VBB Bias Voltage Output for Single-Ended Input Signals
- Receiver Input Threshold ±75 mV
- 24-Terminal QFN Package (4 mm × 4 mm)
- Accepts Any Differential Signaling:
LVDS, HSTL, CML, VML, SSTL-2, and
Single-Ended: LVTTL/LVCMOS
Specifications
Category | Integrated Circuits (ICs)Clock/TimingClock Buffers, Drivers | Series | - |
Type | Fanout Buffer (Distribution), Divider, Multiplexer | Number of Circuits | 1 |
Ratio - Input:Output | 1:3 | Differential - Input:Output | Yes/Yes |
Input | CML, HSTL, LVCMOS, LVDS, LVTTL, SSTL-2, VML | Output | LVPECL |
Frequency - Max | 800 MHz | Voltage - Supply | 3V ~ 3.6V |
Operating Temperature | -40°C ~ 85°C | Mounting Type | Surface Mount |
Base Product Number | CDCP1803 |
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In Stock: 7,344
Minimum Order: 1
Qty. | Unit Price | Ext. Price |
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1+ | - | - |
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