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9DB102BGILF

PCI Express (PCIe) Zero Delay Buffer, Jitter Attenuator IC 101MHz 1 Output 20-TSSOP

9DB102BGILF General Description

The 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.

Renesas Technology Corp Inventory

Key Features

  • 2 - 0.7 V HCSL differential output pairs
  • Phase jitter: PCIe Gen2 < 3.1 ps rms
  • Phase jitter: PCIe Gen1 < 86 ps peak to peak
  • Supports zero delay buffer mode and fanout mode
  • Bandwidth programming available
  • 33-110 MHz operation in PLL mode
  • 10-110 MHz operation in Bypass mode
Renesas Technology Corp Original Stock
Renesas Technology Corp Inventory

Specifications

Category Integrated Circuits (ICs)Clock/TimingApplication Specific Clock/Timing Series -
Programmable Not Verified PLL Yes
Main Purpose PCI Express (PCIe) Input Clock
Output HCSL Number of Circuits 1
Ratio - Input:Output 1:2 Differential - Input:Output Yes/Yes
Frequency - Max 101MHz Voltage - Supply 3.135V ~ 3.465V
Operating Temperature -40°C ~ 85°C Mounting Type Surface Mount
Base Product Number 9DB102

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Availability: 6705 PCS

+BOM
Qty. Unit Price Ext. Price
1+ $2.651 $2.65
200+ $1.026 $205.20
500+ $0.991 $495.50
1000+ $0.973 $973.00

The prices below are for reference only.