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See Technical Specifications

7204L12TPG +BOM

Asynchronous FIFO 36K (4K x 9) Uni-Directional 50MHz 12ns 28-PDIP

Manufacturer:

Renesas Technology Corp
Mfr.Part #:

7204L12TPG
Datasheet:

7204L12TPG Datasheet (PDF)
Pin Count:

28
Released Date:

Feb 19, 2020
Last Modified Date:

Aug 1, 2023 1:40 PM UTC
EDA/CAD Models:

Request Free CAD Models for 7204L12TPG

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7204L12TPG General Description

The 7204 is a 4K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

Key Features

Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed—12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
MIL-STD-883, Class B available in 28 pin (300 & 600 mil) Cerdip and 32 pin LCC packages
Industrial temperature range (–40C to +85C) is available
Available in 28 pin SOIC, PDIP (300 & 600 mil), and 32 pin PLCC packages