This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.

UCC27524DGN +BOM

5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and 1-ns delay Matching

UCC27524DGN General Description

The UCC27524DGN is a reliable and efficient dual gate driver perfect for a variety of applications. With a peak output current of 5A and a low side driver configuration, this driver can handle demanding tasks with ease. Its compact 8Msop case style makes it easy to integrate into your circuit design, while the operating range of 4.5V to 18V ensures compatibility with a wide range of power supplies. With input and output delays of just 13ns, you can trust this driver to deliver fast and precise signals when you need them most. Plus, it's RoHS compliant, so you can feel good about using it in your projects

Key Features

  • Industry-Standard Pinout
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO, (Ensures
    Glitch-Free Operation at Power up and Power
    Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between Two
    Channels
  • Two Outputs are in Parallel for Higher Drive
    Current
  • Outputs Held Low When Inputs Floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and
    3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C

Specifications

Number of channels 2 Power switch GaNFET, IGBT, MOSFET
Peak output current (A) 5 Input VCC (min) (V) 4.5
Input VCC (max) (V) 18 Features Enable pin
Operating temperature range (°C) -40 to 140 Rise time (ns) 7
Fall time (ns) 6 Propagation delay time (µs) 0.013
Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting
Input negative voltage (V) 0 Rating Catalog
Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
feature-driver-type Low Side feature-driver-configuration Non-Inverting
feature-bridge-type feature-number-of-drivers 2
feature-high-and-low-sides-dependency feature-type IGBT|GaNFET|MOSFET
feature-maximum-rise-time-ns 18 feature-maximum-fall-time-ns 10
feature-maximum-operating-frequency-khz feature-maximum-propagation-delay-time-ns 23
feature-minimum-operating-supply-voltage-v 4.5 feature-maximum-operating-supply-voltage-v 18
feature-typical-input-low-threshold-voltage-v 1.2 feature-typical-input-high-threshold-voltage-v 2.1
feature-peak-output-current-a 5(Typ) feature-maximum-power-dissipation-mw
feature-packaging Tube feature-rad-hard
feature-pin-count 8 feature-cecc-qualified No
feature-esd-protection Yes feature-escc-qualified
feature-military No feature-aec-qualified No
feature-aec-qualified-number feature-auto-motive No
feature-p-pap No feature-eccn-code EAR99
feature-svhc No feature-svhc-exceeds-threshold No

Service Policies and Others

After-Sales & Settlement Related

payment Payment

Payment Method

hsbc
TT/Wire Transfer
paypal
Paypal
wu
Western Union
mg
Money Gram

For alternative payment channels, please reach out to us at:

[email protected]
shipping Shipping & Packing

Shipping Method

fedex
Fedex
ups
UPS
dhl
DHL
tnt
NTN
Packing

AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

Warranty Warranty

We promise to provide 365 days quality assurance service for all our products.

Ratings and Reviews

More
Z
Z**e 01/02/2021

Finally the fee came. Saved everything and shurik earned, twisted became as mad.

6

Reviews

You need to log in to reply. Sign In | Sign Up

In Stock: 7,405

Minimum Order: 1

Qty. Unit Price Ext. Price
1+ - -

The prices below are for reference only.