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Clock Generator 0.002MHz to 19.44MHz-IN 65.536MHz-OUT 64-Pin TQFP Tray

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ZL30106QDG1 General Description

The ZL30100 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk T1 and E1 transmission equipment.
The ZL30100 generates ST-BUS and other TDM clock and framing signals that are phase locked to one of two input references. It helps ensure system reliability by monitoring its references for accuracy and stability and by maintaining stable output clocks during reference switching operations and during short periods when a reference is unavailable.
The ZL30100 is intended to be the central timing and synchronization resource for network equipment that complies with Telcordia, ETSI, ITU-T and ANSI network specifications.

Microchip Technology, Inc Inventory

Key Features

  • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs
  • Supports output wander and jitter generation specifications for SONET/SDH and PDH interfaces
  • Accepts three input references and synchronizes to any combination of 2 kHz, 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz inputs
  • Provides automatic entry into Holdover and return from Holdover
  • Manual and automatic hitless reference switching Provides lock, holdover and accurate reference fail indication
  • Selectable loop filter bandwidth of 29 Hz or 922 Hz
    • Provides a range of clock outputs:
    • 2.048 MHz (E1), 16.384 MHz and either 4.096 MHz and 8.192 MHz or 32.768 MHz and 65.536 MHz
    • 19.44 MHz (SONET/SDH)* 1.544 MHz (DS1) and 3.088 MHz
    • a choice of 6.312 MHz (DS2), 8.448 MHz (E2), 44.736 MHz (DS3) or 34.368 MHz (E3)Provides 5 styles of 8 kHz framing pulses and a 2 kHz multi-frame pulse
Microchip Technology, Inc Original Stock


  • Line card synchronization for SONET/SDH and PDH systems
  • Wireless base-station Network Interface Card
  • AdvancedTCA and H.110 line cards


Category Integrated Circuits (ICs)Clock/TimingApplication Specific Clock/Timing Mfr Microchip Technology
Series - Package Tray
Product Status Active Digi-Key Programmable Not Verified
PLL Yes Main Purpose SONET/SDH/PDH
Input Clock, Crystal Output Clock
Number of Circuits 1 Ratio - Input:Output 3:12
Differential - Input:Output No/No Frequency - Max 65.536MHz
Voltage - Supply 2.97V ~ 3.63V Operating Temperature -40°C ~ 85°C
Mounting Type Surface Mount Package / Case 64-TQFP
Supplier Device Package 64-TQFP (10x10)

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