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See Technical Specifications

TMS320C6711DZDP200 +BOM

C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

TMS320C6711DZDP200
Datasheet:

TMS320C6711DZDP200 Datasheet (PDF)
Series:

TMS320C67x
Type:

Floating Point
Interface:

Host Interface, McBSP
Clock Rate:

200MHz
EDA/CAD Models:

Request Free CAD Models for TMS320C6711DZDP200

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TMS320C6711DZDP200 General Description

Additionally, the C6711D is equipped with two McBSPs, two general-purpose timers, an HPI, and an EMIF for interfacing with external memory and peripherals. Development is made easy with a comprehensive set of tools including a new C compiler, assembly optimizer, and Windows debugger interface for enhanced visibility into source code execution

Key Features

Excellent-Price/Performance Floating-Point Digital Signal Processor (DSP):
- Eight 32-Bit Instructions/Cycle
- 167-, 200-, 250-MHz Clock Rates
- 6-, 5-, 4-ns Instruction Cycle Time
- 1000, 1200, 1500 MFLOPS
Advanced Very Long Instruction Word (VLIW) C67x™ DSP Core
- Eight Highly Independent Functional Units:
  - Four ALUs (Floating- and Fixed-Point)
  - Two ALUs (Fixed-Point)
  - Two Multipliers (Floating- and Fixed-Point)
- Load-Store Architecture With 32 32-Bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
Instruction Set Features
- Hardware Support for IEEE Single-Precision and Double-Precision Instructions
- Byte-Addressable (8-, 16-, 32-Bit Data)
- 8-Bit Overflow Protection
- Saturation
- Bit-Field Extract, Set, Clear
- Bit-Counting
- Normalization
L1/L2 Memory Architecture
- 32K-Bit (4K-Byte) L1P Program Cache (Direct Mapped)
- 32K-Bit (4K-Byte) L1D Data Cache (2-Way Set-Associative)
- 512K-Bit (64K-Byte) L2 Unified Mapped RAM/Cache (Flexible Data/Program Allocation)
Device Configuration
- Boot Mode: HPI, 8-, 16-, 32-Bit ROM Boot
- Endianness: Little Endian, Big Endian
Enhanced Direct-Memory-Access (EDMA) Controller (16 Independent Channels)
32-Bit External Memory Interface (EMIF)
- Glueless Interface to Asynchronous Memories: SRAM and EPROM
- Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
- 256M-Byte Total Addressable External Memory Space
16-Bit Host-Port Interface (HPI)
Two Multichannel Buffered Serial Ports (McBSPs)
- Direct Interface to T1/E1, MVIP, SCSA Framers
- ST-Bus-Switching Compatible
- Up to 256 Channels Each
- AC97-Compatible
- Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
Two 32-Bit General-Purpose Timers
Flexible Software Configurable PLL-Based Clock Generator Module
A Dedicated General-Purpose Input/Output (GPIO) Module With 5 Pins
IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
272-Pin Ball Grid Array (BGA) Package (GDP and ZDP Suffixes)
CMOS Technology
- 0.13-µm/6-Level Copper Metal Process
3.3-V I/O, 1.4-V Internal (-250)
3.3-V I/O, 1.20-V Internal

TMS320C67x and C67x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
These values are compatible with existing 1.26V designs.
TMS320C6000 is a trademark of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.
Throughout the remainder of this document, the TMS320C6711D shall be referred to as its individual full device part number or abbreviated as C6711D or 11D.

Specifications

Category	Integrated Circuits (ICs)EmbeddedDSP (Digital Signal Processors)	Series	TMS320C67x
Type	Floating Point	Interface	Host Interface, McBSP
Clock Rate	200MHz	Non-Volatile Memory	External
On-Chip RAM	72kB	Voltage - I/O	3.30V
Voltage - Core	1.26V	Operating Temperature	0°C ~ 90°C (TC)
Mounting Type	Surface Mount	Base Product Number	TMS320