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See Technical Specifications

TLV320DAC3100IRHBR

Stereo audio DAC with 2.5-W mono Class-D speaker amp, 60-mW headphone driver & audio processing

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

TLV320DAC3100IRHBR
Datasheet:

TLV320DAC3100IRHBR Datasheet (PDF)
Type:

DAC
Number of Channels:

2
Resolution (Bits):

24 b
Sampling Rate (Per Second):

192k
EDA/CAD Models:

Request Free CAD Models for TLV320DAC3100IRHBR

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TLV320DAC3100IRHBR General Description

The TLV320DAC3100 device is a low-power, highly integrated, high-performance stereo audio DAC with 24-bit stereo playback and digital audio processing blocks.

The device integrates headphone drivers and speaker drivers. The mono speaker driver can drive loads down to 4 Ω. The TLV320DAC3100 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I²S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled either by pin control or by register control. The audio functions are controlled using the I²C serial bus.

The TLV320DAC3100 device has a programmable digital sine-wave generator and is available in a 32-pin VQFN package.

Key Features

Stereo Audio DAC with 95-dB SNR
Supports 8-kHz to 192-kHz Sample Rates
Mono Class-D BTL Speaker Driver (2.5 W Into 4-Ω or 1.6 W Into 8-Ω)
Two Single-Ended Inputs With Mixing and Output Level Control
Stereo Headphone/Lineout and Mono Class-D Speaker Outputs Available
Microphone Bias
Headphone Detection
25 Built-in Digital Audio Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad and FIR Filters, DRC, and 3-D Structures
Digital Mixing Capability
Pin Control or Register Control for Digital-Playback Volume-Control Settings
Digital Sine-Wave Generator for Beeps and Key Clicks (PRB_P25)
Programmable PLL for Flexible Clock Generation
I²S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
I²C Control With Register Auto-Increment
Full Power-Down Control
Power Supplies:
- Analog: 2.7 V–3.6 V
- Digital Core: 1.65 V–1.95 V
- Digital I/O: 1.1 V–3.6 V
- Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
5-mm × 5-mm 32-VQFN Package

Specifications

Category	Integrated Circuits (ICs)Data AcquisitionADCs/DACs - Special Purpose	Series	-
Type	DAC	Number of Channels	2
Resolution (Bits)	24 b	Sampling Rate (Per Second)	192k
Data Interface	I²C, Serial	Voltage Supply Source	Analog and Digital
Voltage - Supply	1.8V, 3.3V	Operating Temperature	-40°C ~ 85°C
Mounting Type	Surface Mount	Base Product Number	TLV320
Sampling rate (max) (kHz)	192	Control interface	I2C
Architecture	Class-D	Operating temperature range (°C)	-40 to 85
Rating	Catalog	feature-resolution	24bit
feature-maximum-single-supply-voltage-v		feature-minimum-dual-supply-voltage-v
feature-maximum-dual-supply-voltage-v		feature-power-supply-type
feature-packaging	Tape and Reel	feature-minimum-single-supply-voltage-v
feature-rad-hard		feature-pin-count	32
feature-cecc-qualified	No	feature-esd-protection	Yes
feature-escc-qualified		feature-military	No
feature-aec-qualified	No	feature-aec-qualified-number
feature-auto-motive	No	feature-p-pap	No
feature-eccn-code	EAR99	feature-svhc	No
feature-svhc-exceeds-threshold	No