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See Technical Specifications

SN75LVDS83DGGR +BOM

FlatLink™ Transmitter

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

SN75LVDS83DGGR
Datasheet:

SN75LVDS83DGGR Datasheet (PDF)
Protocols:

Catalog
Rating:

Catalog
Operating temperature range (°C):

0 to 70
feature-function:

Transmitter
EDA/CAD Models:

Request Free CAD Models for SN75LVDS83DGGR

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SN75LVDS83DGGR General Description

The SN75LVDS83 FlatLink transmitter contains four 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit links with the SN75LVDS86 receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL) terminal. The frequency of CLKIN is multiplied seven times (7×) and then used to unload the data registers in 7-bit slices and serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN75LVDS83 requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user. The only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low-level signal on SHTDN clears all internal registers to a low level.

The SN75LVDS83 is characterized for operation over free-air temperature ranges of 0°C to 70°C.

Key Features

4:28 Data Channel Compression at up to 238 MBytes/s Throughput
Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
28 Data Channels and Clock-In Low-Voltage TTL
4 Data Channels and Clock-Out Low-Voltage Differential
Operates From a Single 3.3-V Supply With 250 mW (Typ)
ESD Protection Exceeds 6 kV
5-V Tolerant Data Inputs
Selectable Rising or Falling Edge-Triggered Inputs
Packaged in Thin Shrink Small-Outline Package With 20-Mil Terminal Pitch
Consumes Less Than 1 mW When Disabled
Wide Phase-Lock Input Frequency Range . . . 31 MHz to 68 MHz
No External Components Required for PLL
Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
Improved Replacement for the DS90C581

FlatLink is a registered trademark of Texas Instruments.

Specifications

Protocols	Catalog	Rating	Catalog
Operating temperature range (°C)	0 to 70	feature-function	Transmitter
feature-number-of-drivers	5	feature-number-of-receivers	0
feature-number-of-elements-per-chip	4	feature-transmission-data-rate-mbps
feature-maximum-propagation-delay-time-ns		feature-input-signal-type	LVCMOS
feature-differential-input-low-threshold-voltage-v		feature-differential-input-high-threshold-voltage-v
feature-maximum-differential-output-voltage-v	0.454	feature-maximum-input-current-ua	25
feature-supplier-temperature-grade		feature-packaging	Tape and Reel
feature-rad-hard		feature-pin-count	56
feature-cecc-qualified	No	feature-esd-protection
feature-escc-qualified		feature-military	No
feature-aec-qualified	No	feature-aec-qualified-number
feature-eccn-code	EAR99	feature-svhc	No
feature-svhc-exceeds-threshold	No

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Ratings and Reviews

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Z**e 12/03/2021

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