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K4T51163QQ-BCE6 +BOM

Key Features

JEDEC standard 1.8V0.1V Power Supply

VDDQ = 1.8V0.1V

200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin, 333MHz fCK for 667Mb/sec/pin, 400MHz fCK for 800Mb/sec/pin

4 Banks

Posted CAS

Programmable CAS Latency: 3, 4, 5, 6

Programmable Additive Latency: 0, 1 , 2 , 3, 4 , 5

Write Latency(WL) = Read Latency(RL) -1

Burst Length: 4 , 8(Interleave/nibble sequential)

Programmable Sequential / Interleave Burst Mode

Bi-directional Differential Data-Strobe (Single-ended data strobe is an optional feature)

Off-Chip Driver(OCD) Impedance Adjustment

On Die Termination

Special Function Support

-PASR(Partial Array Self Refresh)

-50ohm ODT

-High Temperature Self-Refresh rate enable

Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < T CASE < 95 C

All of Lead-free products are compliant for RoHS

Application

The chip is designed to comply with the following key DDR2 SDRAM features such as posted CAS with additive latency, write latency = read latency -1, Off-Chip Driver(OCD) impedance adjustment and On Die Termination.

Specifications

Product Category Memory ICs

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