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EPM7128SQC100-7

CPLD MAX® 7000S Family 2.5K Gates 128 Macro Cells 125MHz 5V 100-Pin PQFP Tray

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EPM7128SQC100-7 General Description

EPM7128SQC100-7 is a complex programmable logic device (CPLD) manufactured by Intel (formerly Altera). Here are some of its features:

epm7128sqc100-7 epm7128sqc100-7

Key Features

  • It contains 128 macrocells (each with a programmable AND array, a programmable OR array, and a flip-flop).
  • It has 7ns pin-to-pin delay, which means it can operate at a clock frequency of up to 143MHz.
  • It has a maximum pin count of 100, and comes in a Quad Flat Pack (QFP) package.
  • It has a 5V power supply.
epm7128sqc100-7

Application

  • Communications equipment
  • Industrial control systems
  • Test and measurement equipment
  • Automotive electronics
  • Medical equipment

Specifications

feature-family-name MAX® 7000S feature-device-logic-cells
feature-program-memory-type EEPROM feature-memory-size-kbit
feature-ram-bits-kbit feature-number-of-logic-blocks-elements 8
feature-number-of-macro-cells 128 feature-number-of-product-terms-per-macro 32
feature-process-technology CMOS feature-device-system-gates 2500
feature-number-of-user-i-os 84 feature-number-of-flip-flops
feature-programmability Yes feature-programmable-type
feature-maximum-internal-frequency-mhz 166.7 feature-speed-grade 7
feature-in-system-programmability Yes feature-minimum-operating-supply-voltage-v 4.75
feature-maximum-operating-supply-voltage-v 5.25 feature-packaging Tray
feature-rad-hard feature-pin-count 100
feature-cecc-qualified No feature-esd-protection
feature-military No feature-aec-qualified No
feature-aec-qualified-number feature-auto-motive No
feature-p-pap No feature-eccn-code EAR99
feature-svhc Yes feature-svhc-exceeds-threshold Yes

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