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XCV1000-4BG560I +BOM

27648-Cell CMOS FPGA with 250MHz clock speed

XCV1000-4BG560I General Description

The XCV1000-4BG560I from Xilinx's Virtex E family of FPGAs is a versatile and powerful device that can be used in a variety of applications. Its 1 million system gates allow for the implementation of complex digital systems, making it ideal for telecommunications, networking, aerospace, and defense applications. The FPGA also boasts a generous amount of memory resources, including 72 kilobits of distributed RAM and 2 megabits of block RAM, as well as high-speed transceivers for rapid data transfer over serial interfaces. With 560 I/O pins, interfacing with external devices and peripherals is a breeze. Operating at a maximum speed of 360 MHz, the XCV1000-4BG560I provides high performance for demanding tasks


Part Life Cycle Code Obsolete Pin Count 560
Reach Compliance Code not_compliant HTS Code 8542.39.00.01
Clock Frequency-Max 250 MHz Combinatorial Delay of a CLB-Max 0.8 ns
JESD-30 Code S-PBGA-B560 JESD-609 Code e0
Length 42.5 mm Moisture Sensitivity Level 3
Number of CLBs 6144 Number of Equivalent Gates 1124022
Number of Inputs 404 Number of Logic Cells 27648
Number of Outputs 404 Number of Terminals 560
Organization 6144 CLBS, 1124022 GATES Peak Reflow Temperature (Cel) 225
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 1.7 mm Supply Voltage-Max 2.625 V
Supply Voltage-Min 2.375 V Supply Voltage-Nom 2.5 V
Surface Mount YES Technology CMOS
Terminal Finish Tin/Lead (Sn63Pb37) Terminal Form BALL
Terminal Pitch 1.27 mm Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 Width 42.5 mm

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