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MCU 16-bit/32-bit ARM Cortex R4F RISC 2MB Flash 1.2V/3.3V Automotive 144-Pin LQFP

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TMS5702124DPGEQQ1 General Description

The TMS570LS31x4/21x4 device is a high-performance automotive-grademicrocontroller family for safety systems. The safety architecture includes dualCPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the dataSRAM, parity on peripheral memories, and loopback capability on peripheralI/Os.

The TMS570LS31x4/21x4 device integrates the ARM Cortex-R4F Floating-PointCPU. The CPU offers an efficient 1.66 DMIPS/MHz, and has configurations that canrun up to 180 MHz, providing up to 298 DMIPS. The device supports theword-invariant big-endian [BE32] format.

The TMS570LS3134 device has 3MB of integrated flash and 256KB of data RAM.The TMS570LS2134 device has 2MB of integrated flash and 256KB of data RAM. TheTMS570LS2124 device has 2MB of integrated flash and 192KB of data RAM. Both theflash and RAM have single-bit error correction and double-bit error detection.The flash memory on this device is a nonvolatile, electrically erasable, andprogrammable memory implemented with a 64-bit-wide data bus interface. The flashoperates on a 3.3-V supply input (same level as I/O supply) for all read,program, and erase operations. When in pipeline mode, the flash operates with asystem clock frequency of up to 180 MHz. The SRAM supports single-cycle read andwrite accesses in byte, halfword, word, and double-word modes.

The TMS570LS31x4/21x4 device features peripherals for real-time control-basedapplications, including two Next Generation High-End Timer (N2HET) timingcoprocessors and two 12-bit Analog-to-Digital Converters (ADCs) supporting up to24 inputs.

The N2HET is an advanced intelligent timer that provides sophisticated timingfunctions for real-time applications. The timer is software-controlled, using areduced instruction set, with a specialized timer micromachine and an attachedI/O port. The N2HET can be used for pulse-width-modulated outputs, capture orcompare inputs, or GPIO. The N2HET is especially well suited for applicationsrequiring multiple sensor information and drive actuators with complex andaccurate time pulses. A High-End Timer Transfer Unit (HTU) can perform DMA-typetransactions to transfer N2HET data to or from main memory. A Memory ProtectionUnit (MPU) is built into the HTU.

The device has two 12-bit-resolution MibADCs with 24 channels and 64 words ofparity-protected buffer RAM each. The MibADC channels can be convertedindividually or can be grouped by software for sequential conversion sequences.Sixteen channels are shared between the two MibADCs. There are three separategroupings. Each sequence can be converted once when triggered or configured forcontinuous conversion mode. The MibADC has a 10-bit mode for use whencompatibility with older devices or faster conversion time is desired.

The device has multiple communication interfaces: three MibSPIs, two SPIs,one LIN, one SCI, three DCANs, and one I2C module. The SPIs provide a convenientmethod of serial high-speed communication between similar shift-register typedevices. The LIN supports the Local Interconnect standard 2.0 and can be used asa UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ)format.

The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial,multimaster communication protocol that efficiently supports distributedreal-time control with robust communication rates of up to 1 Mbps. The DCAN isideal for systems operating in noisy and harsh environments (for example,automotive vehicle networking and industrial fieldbus) that require reliableserial communication or multiplexed wiring.

The I2C module is a multimaster communication module providing an interfacebetween the microcontroller and an I2C-compatible device through theI2C serial bus. The I2C supports speeds of 100 and 400Kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used tomultiply the external frequency reference to a higher frequency for internaluse. There are two FMPLL modules on this device. These modules, when enabled,provide two of the seven possible clock source inputs to the Global Clock Module(GCM). The GCM manages the mapping between the available clock sources and thedevice clock domains.

The device also has an External Clock Prescaler (ECP) module that whenenabled, outputs a continuous external clock on the ECLK pin (or ball). The ECLKfrequency is a user-programmable ratio of the peripheral interface clock (VCLK)frequency. This low-frequency output can be monitored externally as an indicatorof the device operating frequency.

The DMA controller has 16 channels, 32 peripheral requests, and parityprotection on its memory. An MPU is built into the DMA to limit the DMA toprescribed areas of memory and to protect the rest of the memory system from anymalfunction of the DMA.

The Error Signaling Module (ESM) monitors all device errors and determineswhether an interrupt is generated or the external ERROR pin is toggled when a fault isdetected. The ERROR pin can bemonitored externally as an indicator of a fault condition in themicrocontroller.

The External Memory Interface (EMIF) provides off-chip expansion capabilitywith the ability to interface to synchronous DRAM (SDRAM) devices, asynchronousmemories, peripherals, or FPGA devices.

Several interfaces are implemented to enhance the debugging capabilities ofapplication code. In addition to the built-in ARM Cortex-R4F CoreSight debugfeatures, an External Trace Macrocell (ETM) provides instruction and data traceof program execution. For instrumentation purposes, a RAM Trace Port (RTP)module is implemented to support high-speed tracing of RAM and peripheralaccesses by the CPU or any other master. A Data Modification Module (DMM) givesthe ability to write external data into the device memory. Both the RTP and DMMhave no or only minimum impact on the program execution time of the applicationcode. A Parameter Overlay Module (POM) can reroute flash accesses to internalmemory or to the EMIF. This rerouting allows the dynamic calibration againstproduction code of parameters and tables without rebuilding the code toexplicitly access RAM or halting the processor to reprogram the data flash.

With integrated safety features and a wide choice of communication andcontrol peripherals, the TMS570LS31x4/21x4 device is an ideal solution forhigh-performance real-time control applications with safety-critical

Texas Instruments, Inc Inventory

Key Features

  • High-Performance Microcontroller for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4F 32-Bit RISC CPU
    • Efficient 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 12-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • System Clock up to 180 MHz
    • Core Supply Voltage (VCC): 1.2 V Nominal
    • I/O Supply Voltage (VCCIO): 3.3 V Nominal
    • ADC Supply Voltage (VCCAD): 3.0 to 5.25 V
  • Integrated Memory
    • 3MB of Program Flash With ECC (LS3134)
    • 2MB of Program Flash With ECC (LS2134/2124)
    • 256KB of RAM With ECC (LS3134/2134)
    • 192KB of RAM With ECC (LS2124)
    • 64KB of Flash With ECC for Emulated EEPROM
  • 16-Bit External Memory Interface
  • Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer OS Timer
    • 96-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Direct Memory Access (DMA) Controller
    • 16 Channels and 32 Peripheral Requests
    • Parity Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • Trace and Calibration Capabilities
    • Embedded Trace Macrocell (ETM-R4)
    • Data Modification Module (DMM)
    • RAM Trace Port (RTP)
    • Parameter Overlay Module (POM)
  • Multiple Communication Interfaces
    • Three CAN Controllers (DCANs)
      • 64 Mailboxes, Each With Parity Protection
      • Compliant to CAN Protocol Version 2.0B
    • Standard Serial Communication Interface (SCI)
    • Local Interconnect Network (LIN) Interface Controller
      • Compliant to LIN Protocol Version 2.1
      • Can be Configured as a Second SCI
    • Inter-Integrated Circuit (I2C)
    • Three Multibuffered Serial Peripheral Interfaces (MibSPIs)
      • 128 Words With Parity Protection Each
    • Two Standard Serial Peripheral Interfaces (SPIs)
  • Two Next Generation High-End Timer (N2HET) Modules
    • N2HET1: 32 Programmable Channels
    • N2HET2: 18 Programmable Channels
    • 160-Word Instruction RAM Each With Parity Protection
    • Each N2HET Includes Hardware Angle Generator
    • Dedicated High-End Transfer Unit (HTU) With MPU for Each N2HET
  • Two 12-Bit Multibuffered ADC Modules
    • ADC1: 24 Channels
    • ADC2: 16 Channels Shared With ADC1
    • 64 Result Buffers With Parity Protection Each
  • General-Purpose Input/Output (GPIO) Pins Capable of Generating Interrupts
    • 16 Pins on the ZWT Package
    • 10 Pins on the PGE Package
  • IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
  • JTAG Security Module
  • Packages
    • 144-Pin Quad Flatpack (PGE) [Green]
    • 337-Ball Grid Array (ZWT) [Green]

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Texas Instruments, Inc Original Stock
Texas Instruments, Inc Inventory


genericPartNumber TMS570LS2124 orderablePartNumber TMS5702124DPGEQQ1
partDescription 16/32 Bit RISC Flash MCU, Arm Cortex-R4F statusDisplay ACTIVE
statusDescription This product has been released to the market and is available for purchase. For some products, newer alternatives may be available. packageQuantity 60
packageQtyCarrier 60|— packagePins LQFP (PGE)|144
Frequency (MHz) 160, 180 Flash memory (kByte) 2048
RAM (kByte) 192 ADC type 2 x 12-bit (24ch)
Number of GPIOs 144 UART 2
Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant
Operating temperature range (°C) -40 to 125 Ethernet No
PWM (Ch) 40, 44 SPI 1, 2
CAN (#) 3 Power supply solution TPS65381A-Q1
Communication interface CAN, SPI, UART feature-tradename
feature-data-bus-width-bit 32|16 feature-minimum-operating-supply-voltage-v 3|1.14
feature-interface-type CAN/I2C/SCI/SPI feature-maximum-operating-supply-voltage-v 3.6|1.32
feature-packaging feature-rad-hard
feature-pin-count 144 feature-supplier-package LQFP
feature-standard-package-name1 QFP feature-cecc-qualified No
feature-esd-protection feature-escc-qualified
feature-military No feature-aec-qualified Yes
feature-aec-qualified-number AEC-Q100 feature-auto-motive Yes
feature-p-pap Yes feature-eccn-code 3A991.a.2
feature-svhc Yes


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The delivery time is usually within 2-7 days, depending on the logistics provider and the area of delivery.

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Checks and other instruments are not supported to pay for orders and customers are required to pay all possible fees, including sales tax,
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Our policies and procedures are designed to ensure compliance with various quality specifications and to quickly resolve quality-related issues.

We promise to provide 365 days quality assurance service for all our products.

If you have any dissatisfaction with the quality of the product you received, you can contact us for a refund or exchange, as long as the product is kept in its original condition.


AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.
  • ESD


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Buying Guide

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