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PKD01AY +BOM

Sample and Hold 2-CH 70us 14-Pin CDIP

PKD01AY Information

pkd01ay pkd01ay

Key Features


Monolithic Design for Reliability and Low Cost
High Slew Rate: 0.5 V/μs
Low Droop Rate
TA = 25°C: 0.1 mV/ms
TA = 125°C: 10 mV/ms
Low Zero-Scale Error: 4 mV
Digitally Selected Hold and Reset Modes
Reset to Positive or Negative Voltage Levels
Logic Signals TTL and CMOS Compatible
Uncommitted Comparator On-Chip
Available in Die Form

pkd01ay pkd01ay
pkd01ay

Specifications

place Philippines launch_date Feb 28, 2001
last_inspection_date 07 APR 2023 supplier_cage_code 24355
htsusa 8542390001 schedule_b 8542390000
ppap False aec False
Package/Case CDIP

Service Policies and Others

After-Sales & Settlement Related

payment Payment

Payment Method +

hsbc
TT/Wire Transfer
paypal
Paypal
wu
Western Union
mg
Money Gram

For alternative payment channels, please reach out to us at:

[email protected]
shipping Shipping & Packing

Shipping Method +

fedex
Fedex
ups
UPS
dhl
DHL
tnt
TNT
Packing +

AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

Warranty Warranty

365-Day Product Quality Guarantee +

We promise to provide 365 days quality assurance service for all our products.
After Sales Service +

Returns and exchanges are supported, provided the items remain in their original condition.

Ratings and Reviews

More
S
S**n 07/16/2022

Mike was great to work with. Thank you for the order!

3
A
A**m 10/08/2021

Looks good, it takes time to check.

17
J
J**s 07/01/2021

Order delivered quickly, transistor tester shows normal parameters, confuse the thin conclusions, seller thanks and five stars!

14
J
J**n 12/22/2020

Delivery month, one put in bp laptop-working.

6

Reviews

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