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Ic,Operational Amplifier,Single,Bipolar/Jfet,Dip,8Pin,Ceramic

OP42AZ General Description

The OP-42 is a fast precision JFET-input operational amplifier. Similar in speed to the OP-17, the OP-42 offers a symmetric 58V/µs slew rate and is internally compensated for unity-gain operation. OP-42 speed is achieved with a supply current of less than 6mA. Unity gain stability, a wide full-power bandwidth of 900kHz, and a fast settling-time of 800ns to 0.01% make the OP-42 an ideal output amplifier for fast digital-to-analog converters. Equal attention was given to both speed and precision in the OP-42 design. Its tight 750µV maximum input offset voltage combined with well-controlled drift of less than 10µV/%C eliminates the need for external nulling in many circuits. The common-mode rejection of the 88dB minimum over a ±11 V input voltage range is exceptional for a high-speed amplifier. High CMR combined with a minimum 500V/mV gain into 10k(ohm) load ensure excellent linearity in both noninverting and inverting gain configurations. The low input bias and offset currents provided by the JFET input stage suit the OP-42 for use in high-speed sample and hold circuits, peak detectors, and log amplifiers. Excellent radiation hardness characteristics make the OP-42 ideal for military and aerospace applications. The OP-42 conforms to the standard 741 pinout with nulling to V-. The OP-42 upgrades the performance of circuits using the AD544, AD611, AD711, and LF400 by direct replacement. In circuits without nulling, the OP-42 offers an upgrade for designs using the OP-16, OP-17, LT1022, LT1056, and HA2510.


Source Content uid OP42AZ Pbfree Code No
Part Life Cycle Code Obsolete Pin Count 8
Reach Compliance Code ECCN Code EAR99
HTS Code 8542.33.00.01 Amplifier Type OPERATIONAL AMPLIFIER
Architecture VOLTAGE-FEEDBACK Average Bias Current-Max (IIB) 0.02 µA
Bias Current-Max (IIB) @25C 0.0002 µA Common-mode Reject Ratio-Min 86 dB
Common-mode Reject Ratio-Nom 94 dB Frequency Compensation YES
Input Offset Current-Max (IIO) 0.00004 µA Input Offset Voltage-Max 2000 µV
JESD-30 Code R-GDIP-T8 JESD-609 Code e0
Low-Bias YES Low-Offset NO
Neg Supply Voltage Limit-Max -20 V Neg Supply Voltage-Nom (Vsup) -15 V
Number of Functions 1 Number of Terminals 8
Operating Temperature-Max 125 °C Operating Temperature-Min -55 °C
Qualification Status Not Qualified Seated Height-Max 5.08 mm
Slew Rate-Min 45 V/us Slew Rate-Nom 52 V/us
Supply Current-Max 6 mA Supply Voltage Limit-Max 20 V
Supply Voltage-Nom (Vsup) 15 V Surface Mount NO
Technology BIPOLAR Temperature Grade MILITARY
Terminal Finish TIN LEAD Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm Terminal Position DUAL
Unity Gain BW-Nom 10000 Voltage Gain-Min 100000
Width 7.62 mm Package/Case 8-CERDIP

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