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See Technical Specifications

GAL16V8D-25QPN +BOM

16 INPUT, 8 OUTPUT, 5V, 1/4 POWER, 25NS, PB-FREE

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

GAL16V8D-25QPN
Datasheet:

GAL16V8D-25QPN Datasheet (PDF)
Programmabe:

Not Verified
Programmable Type:

EE PLD
Number Of Macrocells:

8
Mounting Type:

Through Hole
EDA/CAD Models:

Request Free CAD Models for GAL16V8D-25QPN

GAL16V8D-25QPN Information

General Description

The GAL16V8D-25QPN from Lattice Semiconductor is a cutting-edge Programmable Logic Device designed to meet the diverse needs of engineers and designers. Boasting a maximum operating frequency of 25MHz, this GAL16V8 series device features 8 input pins and 8 output pins, making it highly adaptable for various logic function implementations. Its 32 macrocells, offering combinatorial and registered modes, provide users with unparalleled programming flexibility to customize the device according to specific project requirements. With a maximum propagation delay of 25ns, the GAL16V8D-25QPN ensures reliable and efficient performance for a wide range of logic applications. Operating on a single 5V power supply and housed in a 20-pin PDIP package, integration into circuit designs is a breeze. From logic design to control systems and interfacing tasks, this PLD is the preferred choice for engineers seeking a versatile and dependable solution

Key Features

HIGH PERFORMANCE E2CMOS®TECHNOLOGY
—3.5 ns Maximum Propagation Delay
—Fmax = 250 MHz
—3.0 ns Maximum from Clock Input to Data Output
—UltraMOS®
Advanced CMOS Technology
50% to 75% REDUCTION IN POWER FROM BIPOLAR
—75mA Typ Icc on Low Power Device
—45mA Typ Icc on Quarter Power Device
ACTIVE PULL-UPS ON ALL PINS
E2CELL TECHNOLOGY
—Reconfigurable Logic
—Reprogrammable Cells
—100% Tested/100% Yields
—High Speed Electrical Erasure (<100ms)
—20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
—Maximum Flexibility for Complex Logic Designs
—Programmable Output Polarity
—Also Emulates 20-pin PAL®
Devices with Full
Function/Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
—100% Functional Testability
APPLICATIONS INCLUDE:
—DMA Control
—State Machine Control
—High Speed Graphics Processing
—Standard Logic Speed Upgrade
ELECTRONIC SIGNATURE FOR IDENTIFICATION
LEAD-FREE PACKAGE OPTIONS

Specifications

Programmabe	Not Verified	Programmable Type	EE PLD
Number of Macrocells	8	Voltage - Input	-
Speed	-	Mounting Type	Through Hole
Package/Case	PDIP-20