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See Technical Specifications

DRA793BDGCBDRQ1 +BOM

500 MHz Arm Cortex-A15 SoC processor w/ 750 MHz C66x DSP for audio amplifier

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

DRA793BDGCBDRQ1
Datasheet:

DRA793BDGCBDRQ1 Datasheet (PDF)
Arm CPU:

1 Arm Cortex-A15
Arm (max) (MHz):

500
Coprocessors:

2 Dual Arm Cortex-M4
CPU:

32-bit
EDA/CAD Models:

Request Free CAD Models for DRA793BDGCBDRQ1

DRA793BDGCBDRQ1 Information

General Description

Developers will appreciate the flexibility provided by the Arm processor, allowing for separate control functions from other algorithms executed on the DSP and coprocessors. TI offers a comprehensive set of development tools, including C compilers and debugging interfaces, to facilitate efficient programming on the Arm and DSP cores

Key Features

Architecture designed for infotainment co-processor applications, hybrid radio and amplifier applications
Arm^® Cortex^®-A15 microprocessor subsystem
C66x floating-point VLIW DSP
- Fully object-code compatible with C67x and C64x+
- Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
Up to 512KB of on-chip L3 RAM
Level 3 (L3) and Level 4 (L4) interconnects
DDR3/DDR3L Memory Interface (EMIF) module
- Supports up to DDR-1333 (667 MHz)
- Up to 2GB across single chip select
Dual Arm® Cortex®-M4 Image Processing Units (IPU)
Display subsystem
- Display controller With DMA engine and up to three pipelines
- HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
Video Processing Engine (VPE)
One Video Input Port (VIP) module
- Support for up to four multiplexed input ports
General-Purpose Memory Controller (GPMC)
Enhanced Direct Memory Access (EDMA) controller
2-port gigabit ethernet (GMAC)
- Up to two external ports
Sixteen 32-bit general-purpose timers
32-Bit MPU watchdog timer
Six high-speed inter-integrated circuit (I²C) ports
HDQ™/1-Wire^® Interface
Ten configurable UART/IrDA/CIR modules
Four Multichannel Serial Peripheral Interfaces (McSPI)
Quad SPI Interface (QSPI)
Media Local Bus Subsystem (MLBSS)
Eight Multichannel Audio Serial Port (McASP) modules
SuperSpeed USB 3.0 dual-role device
High-speed USB 2.0 dual-role device
High-speed USB 2.0 on-the-go
Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD^®/SDIO)
PCI Express^® 3.0 subsystems with two 5-Gbps lanes
- One 2-lane Gen2-compliant port
- or two 1-lane Gen2-compliant ports
Dual Controller Area Network (DCAN) modules
- CAN 2.0B protocol
MIPI^® CSI-2 camera serial interface
Up to 186 General-Purpose I/O (GPIO) pins
Device security features
- Hardware crypto accelerators and DMA
- Firewalls
- JTAG lock
- Secure keys
- Secure ROM and boot
- Customer programmable keys
Power, reset, and clock management
On-chip debug with CTools technology
28-nm CMOS technology
17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)

Specifications

Arm CPU	1 Arm Cortex-A15	Arm (max) (MHz)	500
Coprocessors	2 Dual Arm Cortex-M4	CPU	32-bit
Display type	1 HDMI, 2 LCD	Protocols	Ethernet, ICSS, Profibus
Ethernet MAC	1-Port 10/100/1000, 2-Port 1Gb switch	PCIe	2 PCIe Gen 2
Hardware accelerators	1 Audio Tracking Logic, 2 Viterbi Decoder	Features	Multimedia
Operating system	Android, Linux, RTOS	Security	Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection
Rating	Automotive	Operating temperature range (°C)	-40 to 125
feature-tradename		feature-data-bus-width-bit	32
feature-minimum-operating-supply-voltage-v		feature-maximum-operating-supply-voltage-v
feature-packaging	Tape and Reel	feature-interface-type
feature-rad-hard		feature-pin-count	538
feature-cecc-qualified		feature-esd-protection
feature-escc-qualified		feature-military	No
feature-aec-qualified	Yes	feature-aec-qualified-number	AEC-Q100
feature-eccn-code	5A992.c	feature-svhc
feature-svhc-exceeds-threshold	No	Package/Case	FCCSP-538