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1:4 ultra-low jitter crystal-in clock generator

CDCM61004RHBT General Description

Engineered for versatility, the CDCM61004RHBT comes equipped with programmable dividers that empower users to easily customize clock frequencies to suit their unique requirements. What's more, its energy-efficient design makes it a suitable choice for battery-operated applications, providing a reliable solution for on-the-go electronic devices. With a user-friendly interface for quick configuration through serial control, this clock generator streamlines the design process and accelerates time-to-market for electronic systems, all while delivering solid performance that meets the demands of modern applications

Key Features

  • One Crystal/LVCMOS Reference Input
    Including 24.8832 MHz, 25 MHz, and 26.5625 MHz
  • Input Frequency Range: 21.875 MHz to
    28.47 MHz
  • On-Chip VCO Operates in Frequency Range of

    1.75 GHz to 2.05 GHz
  • 4x Output Available:
    • Pin-Selectable Between LVPECL, LVDS, or
      2-LVCMOS; Operates at 3.3 V
  • LVCMOS Bypass Output Available
  • Output Frequency Selectable by /1, /2, /3, /4, /6,
    /8 from a Single Output Divider
  • Supports Common LVPECL/LVDS Output
    • 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz,
      100 MHz, 106.25 MHz, 125 MHz, 150 MHz,
      155.52 MHz, 156.25 MHz, 159.375 MHz,
      187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz,
      311.04 MHz, 312.5 MHz, 622.08 MHz,
      625 MHz
  • Supports Common LVCMOS Output Frequencies:
    • 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz,
      100 MHz, 106.25 MHz, 125 MHz, 150 MHz,
      155.52 MHz, 156.25 MHz, 159.375 MHz,
      187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz
  • Output Frequency Range: 43.75 MHz to
    683.264 MHz
  • Internal PLL Loop Bandwidth: 400 kHz
  • High-Performance PLL Core:
    • Phase Noise typically at –146 dBc/Hz at
      5-MHz Offset for 625-MHz LVPECL Output
    • Random Jitter typically at 0.509 ps, RMS
      (10 kHz to 20 MHz) for 625-MHz LVPECL Output
  • Output Duty Cycle Corrected to 50% (± 5%)
  • Low Output Skew of 30 ps on LVPECL Outputs
  • Divider Programming Using Control Pins:
    • Two Pins for Prescaler/Feedback Divider
    • Three Pins for Output Divider
    • Two Pins for Output Select
  • Chip Enable Control Pin Available
  • 3.3-V Core and I/O Power Supply
  • Industrial Temperature Range: –40°C to 85°C
  • 5-mm × 5-mm, 32-pin, VQFN (RHB) Package
  • ESD Protection Exceeds 2 kV (HBM)


Function Clock generator Number of outputs 4
Output frequency (max) (MHz) 683.264 Core supply voltage (V) 3.3
Output supply voltage (V) 3.3 Input type LVCMOS, XTAL
Output type LVPECL Operating temperature range (°C) -40 to 85
Features 3.3-V VCC/VDD, Pin programmable Rating Catalog

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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

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