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ADC09SJ800AAVQ1 +BOM

Automotive single-channel, 9-bit, 800-MSPS analog-to-digital converter (ADC) with JESD204C interface

Manufacturer:

Texas Instruments, Inc
Mfr.Part #:

ADC09SJ800AAVQ1
Datasheet:

ADC09SJ800AAVQ1 Datasheet (PDF)
Sample Rate (max) (Msps):

800
Resolution (Bits):

9
Number Of Input Channels:

1
Interface Type:

JESD204B, JESD204C

ADC09SJ800AAVQ1 Information

General Description

In summary, the ADC09SJ800AAVQ1 offers automotive designers a versatile and efficient solution for analog-to-digital conversion requirements. Its combination of speed, resolution, interface compatibility, and temperature resilience makes it a valuable asset in modern vehicle electronics. Whether used in infotainment systems, safety features, or powertrain controls, this ADC delivers consistent performance and data integrity, contributing to the overall functionality and safety of automotive systems

Key Features

AEC-Q100 qualified for automotive applications:
- Temperature grade 1: –40°C to +125°C, T_A
ADC Core:
- Resolution: 9 Bit
- Non-interleaved architecture
- Internal dither reduces high-order harmonics
Performance specifications:
- SNR (–1 dBFS, 97 MHz): 53.5 dBFS
- ENOB (–1 dBFS, 97 MHz): 8.51 Bits
- SFDR (–1 dBFS, 97 MHz): 64 dBFS
- Noise floor (–20 dBFS, 97 MHz): –140.5 dBFS/Hz
Full-scale input voltage: 800 mV_PP-DIFF
Full-power input bandwidth: 6 GHz
JESD204C Serial data interface:
- Support for 2 to 8 (Quad/Dual channel) or 1 to 4 (Single channel) total SerDes lanes
- Maximum baud-rate: 17.16 Gbps
- 64B/66B and 8B/10B encoding modes
- Subclass-1 support for deterministic latency
- Compatible with JESD204B receivers
Optional internal sampling clock generation
- Internal PLL and VCO (7.2–8.2 GHz)
SYSREF Windowing eases synchronization
Four clock outputs simplify system clocking
- Reference clocks for FPGA or adjacent ADC
- Reference clock for SerDes transceivers
Timestamp input and output for pulsed systems
Power consumption (800 MSPS):
- Quad Channel: 420 mW / channel
- Dual channel: 555 mW / channel
- Single channel: 840 mW
Power supplies: 1.1 V, 1.9 V

Specifications

Sample rate (max) (Msps)	800	Resolution (Bits)	9
Number of input channels	1	Interface type	JESD204B, JESD204C
Analog input BW (MHz)	6000	Features	Ultra High Speed
Rating	Automotive	Peak-to-peak input voltage range (V)	0.8
Power consumption (typ) (mW)	830	Architecture	Folding Interpolating
SNR (dB)	53.5	ENOB (Bps)	8.5
SFDR (dB)	64	Operating temperature range (°C)	-40 to 125
Input buffer	Yes	feature-resolution
feature-maximum-single-supply-voltage-v		feature-minimum-dual-supply-voltage-v
feature-maximum-dual-supply-voltage-v		feature-power-supply-type
feature-packaging		feature-minimum-single-supply-voltage-v
feature-rad-hard		feature-pin-count
feature-cecc-qualified		feature-esd-protection
feature-escc-qualified		feature-military
feature-aec-qualified	Yes	feature-aec-qualified-number	AEC-Q100
feature-auto-motive	Yes	feature-p-pap	Yes
feature-eccn-code	3A991.c.1	feature-svhc
feature-svhc-exceeds-threshold		Package/Case	FCCSP-144